OpenShortPlatform
  ESI OpenShortPlatform, including two crucial technologies “Smart defect screen and sample technology” and “Defect size metrology technology”, can discover various types of tiny yield loss defects in advanced process. It will benefit fab to achive better wafer yield and shorten time to mass production. More than that, ESI OpenShortPlatform can discover process incident earlier, fix process issue in time, and avoid defect disaster loss.

Smart Defect Screen and Sample Platform
  Very often Fab suffers big issue in discovering bad defects in advanced technology. ESI’s invention patent, Method for smart defect screen and sample, maps inline defect to corresponding IC design layout and performs Critical Area Analysis to classify nuisance defect and killer defect. The breakthrough is this smart defect screen platform can identify and filter nuisance defects accurately. The basic concept in ESI’s invention is “The more nuisance defects to be filtered accurately, the more bad defects to be discovered.” Elite Semiconductor Inc. owns exclusive patent invention technology: ‘Method for smart defect screen and sample’ (US 8312401, 、CN1614876、ROC I402928). The prior art search was completed by Gainia Intelligent Asset Services, Inc. (www.GainIA.com), Gainia provides the IP business service at Industrial Technology Research Institute in Taiwan. Gainia pointed out that ESI’s patent invention ”Method for smart defect screen and sample (US 8312401、CN1614876、ROC I402928)” is the founder of Artificial Intellegence defect analysis in the world. ESI OpenShortPlatform is one of a kind in the industry.

Defect Size Metrology Platform
  To meet the more advanced 5nm and 3nm process challenges, ESI already finished the development of defect size metrology technology and patent portfolio. Nuisance defects are falsely classified into killer defects because of incorrect defect size measurement results. ESI’s defect size metrology technology successfully improves wafer yield by providing correct defect size.